ECE 565 - Physical Design Automation

Description:  Credit 4. Computer-aided physical design of integrated circuits; circuit partitioning and placement; floorplanning; global and detailed routing; timing optimization; general optimization tools: local search, constraint relaxation.Same as CS 565.

Prerequisite:  CS 401 and (CS 466 or ECE 465)


  1. Algorithms for VLSI Physical Design Automation, Naveed Sherwani, 1995 
  2. VLSI Physical Design Automation: Theory and Practice, Sadiq M. Sait and Habib Youssef, 1995.
  • Circuit Partitioning 
  • Cell Placement 
  • General Optimization Techniques: Simulated Annealing, Local Search, 
  • Mathematical Programming
  • Floorplanning/Building Block Placement 
  • Compaction 
  • Signal Routing 
  • Clock Routing 
  • Timing Optimization 
  • Technology Specific CAD: FPGAs 
  • Design Rule Checking 
  • Advanced Topics